Low dropout PNP bipolar transistor regulators offer a number of benefits which are difficult to replicate with NPN, NMOS, or PMOS transistor based linear regulators, such as reverse input protection, reverse current protection, reverse output protection, low dropout in single supply operation, and low minimum input voltage Vin. Nonetheless, given the high base current requirements of high power PNP based regulators, its driver circuit design is rather involved as it requires tradeoffs in minimum operating voltage, bandwidth, and quiescent current.
While there are many driver circuitries being used in the prior art, they all suffer from significant drawbacks. For instance, FIG. 1 illustrates a commonly used driver circuit 10 which is an NPN bipolar transistor Darlington driver. The driver circuit 10 drives the base of the PNP power transistor 12. An input voltage Vin is applied to the emitter of the PNP power transistor 12, and the collector of the PNP power transistor 12 provides the output voltage Vout to a load typically connected to ground. A feedback control signal is applied to the input of the driver circuit 10, where the control signal is based on the Vout level. The feedback loop (not shown) adjusts the control signal so Vout, or a divided Vout, matches a fixed set voltage. If Vout is above the target voltage, the feedback loop causes the control signal to go down to reduce the conductivity of the PNP power transistor 12 (and to reduce the current through the load) to cause Vout to be at the target voltage.
The various voltage drops of the transistors in FIG. 1 require the minimum Vin to be greater than 2 volts for proper operation, which is too high for some common applications.
FIG. 2 shows another type of driver circuit 16, which provides current gain by utilizing multiple current mirrors. But this approach degrades loop bandwidth (due to additional nodes in the signal path) as well as the regulator's line regulation.
FIG. 3 illustrates a driver 20 where the base of the NPN driver transistor 22 is coupled to a constant current source 24 that can supply sufficient current to pull the base of the PNP power transistor 12 low (for maximum conductivity) over all process and temperature fluctuations. Such a potentially large current source can dramatically increase the quiescent current of the regulator.
FIG. 4 illustrates an NPN driver transistor 26 that is driven by tapping off a small portion of the PNP power transistor 12 base current. However, this can be dangerous as there will be large thermal gradients across the PNP power transistor 12 that will affect the amount of the PNP power transistor base current that is diverted into the NPN driver transistor 26. Moreover, because the driver uses a positive feedback loop, operation of the regulator can lead to loop instabilities especially for a high bandwidth regulator.
Therefore, what is needed is a driver for a PNP power transistor in an LDO regulator that does not suffer from the above-described drawbacks. The LDO regulator should operate with a low input voltage Vin, have high speed, draw low quiescent currents, and a have good high frequency power supply rejection ratio (PSRR).